Style procédural

( modèle de transistor MOS: package, modèle générique, inverseur CMOS)
 
Le package mos_param et le modèle d'un transistor MOS spécifies avec le style  procédural :
 
package mos_param is
type mosmodel is
record
nss: real;
tox: real;
eg: real;
phim: real;
i: real;
mun: real;
na: real;
vbs: real;
end record mosmodel;
type mos_type is (nmos, pmos);
constant epsilon_s0: real := 8.85418e-12;
constant epsilon_ox: real := 3.9*epsilon_S0;
constant epsilon_si: real := 11.7*epsilon_S0;
constant electron_charge: real := 1.602191e-19;
constant boltzmann: real:= 1.380226e-23;
constant ni: real:= 1.45e16;
end package mos_param;
 
 

Modèle générique et procédural du transistor MOS :
 
use mos_param.all;
use IEEE.math_real.all;
entity mos is
generic(most:mos_type:= nmos;width,length:real:= 100.0e-6;
        model:mos_model:=(nss: real:= 1.0e11; tox: real:= 1.0e-9; phims: real:= 0.8;
        mun: real:=; na: real:=1.45e17; vbs: real:= 0.0));
port(terminal: drain, gate, source, bulk: electrical);
end mos;
architecture levelone of mos is
quantity id through drain;
quantity vbs across bulk to source;
quantity vds across drain to source;
quantity vgs across gate to source;
begin
mos_proc:
procedural
variable lambda,vt,phif,phims,cox,qss,vfb,gamma,vt0,beta: real;
begin
if most=nmos then lambda:= 1.0;
else lambda= -1.0;
vt= boltzmann*temp/electron_charge;
phif =vt* ln(na/ni);
cox := epsilon_ox/tox;
qss := nss*electron_charge;
vfb := phims - qss/cox;
gamma := sqrt(2*electron_charge*epsilon_si*na)/cox;
vt0 := vfb + 2*phif + gamma*sqrt(2*phif - vbs) - sqrt(2*phif));
beta := mun*cox*width/length;
if vds < (vgs - vt0) use
id := beta*(1+lambda*vds)*((vgs-vt)*vds - vds**2/2);
else
id := (beta/2) *(1+lambda*vds)*(vgs-vt)**2;
end use;
end procedural;
end levelone;
 
Modèle d'un inverseur cmos décrit à partir de la définition du MOS ci-dessus:
 
 
use mos_param.all;
use IEEE.math_rael.all;
entity inverter is
port(terminal cmosin, cmosout: electrical)
end inverter;
architecture cmos of inverter is
component mos
generic(mos_type: most;width,length:real;
        model:mos_model:=(nss: real ; tox: real; eg: real; phim: real;
        ki: real ; mun: real ; na: real ; vbs: real: ));
port(terminal: drain, gate, source, bulk: electrical);
end mos;
constant vdd: voltage:= 3.3;
begin
inmos: generic map (nmos; 100.0e-6;100.0e-6; 
                   (1.0e11; 1.0e-9; 0.8; mun;1.45e17;0.0));
  port map(cmosout, cmosin, ground, ground);
ipmos: generic map (pmos; 100.0e-6;100.0e-6; 
                   (1.0e11; 1.0e-9; 0.8; mun;1.45e17;0.0));
  port map(cmosout, cmosin, vdd, vdd);
end cmos;