See Also

Parameterized dual-port RAM megafunction. This megafunction is provided only for backward compatibility in Cyclone^™, Stratix^™, and Stratix^™ GX designs; instead, Altera^® recommends using the altsyncram megafunction. The altdpram function uses Embedded System Blocks (ESB) in APEX^™ 20K, APEX^™ II, ARM^®-based Excalibur^™, and Mercury^™ devices, Embedded Array Blocks (EAB) in ACEX^® 1K and FLEX 10KE devices, or DFFE primitives or latch arrays in FLEX^® 6000, MAX^® 3000, and MAX 7000 devices, or if the USE_EAB parameter is set to "OFF". Altera strongly recommends using synchronous rather than asynchronous RAM functions. You can use the altdpram function to access ACEX 1K, APEX 20K, APEX II, ARM-based Excalibur, FLEX 10KE, and Mercury dual-port RAM hardware features that are not available in lpm_ram_dp, such as asynchronous clear of registers.

The Quartus® II Compiler automatically implements suitable portions of this function in ESBs in APEX 20K, APEX II, ARM-based Excalibur, and Mercury devices, and in EABs in ACEX 1K and FLEX 10KE devices. The Compiler automatically implements this function in logic cells in FLEX 6000, MAX 3000, and MAX 7000 devices. The altdpram function is not available for VHDL designs.

Altera also recommends instantiating this function as described in Using the MegaWizard^® Plug-In Manager.

This topic contains the following information:

• AHDL Function Prototype (also applies to Verilog HDL)
• VHDL Component Declaration
• VHDL LIBRARY-USE Declaration (not required if the VHDL Component Declaration is used)
• Port Descriptions
• Parameter Descriptions
• Truth Table/Functionality
• Resource Usage

FUNCTION altdpram (data[WIDTH-1..0], rdaddress[WIDTHAD-1..0],
      wraddress[WIDTHAD-1..0], wren, inclock, inclocken, rden,
      outclock, outclocken, aclr)
	WITH (WIDTH, WIDTHAD, NUMWORDS, FILE, INDATA_REG, INDATA_ACLR,
      WRADDRESS_REG, WRADDRESS_ACLR, WRCONTROL_REG, WRCONTROL_ACLR,
      RDADDRESS_REG, RDADDRESS_ACLR, RDCONTROL_REG, RDCONTROL_ACLR,
      OUTDATA_REG, OUTDATA_ACLR, USE_EAB)
   RETURNS (q[WIDTH-1..0]);

COMPONENT altdpram
   GENERIC
      ( WIDTH          : NATURAL;
        WIDTHAD        : NATURAL;
        NUMWORDS       : NATURAL;
        LPM_FILE       : STRING := "UNUSED";
        LPM_HINT       : STRING := "USE_EAB=ON";
        INDATA_REG     : STRING := "UNREGISTERED";
        INDATA_ACLR    : STRING := "OFF";
        WRADDRESS_REG  : STRING := "UNREGISTERED";
        WRADDRESS_ACLR : STRING := "OFF";
        WRCONTROL_REG  : STRING := "UNREGISTERED";
        WRCONTROL_ACLR : STRING := "OFF";
        RDADDRESS_REG  : STRING := "UNREGISTERED";
        RDADDRESS_ACLR : STRING := "OFF";
        RDCONTROL_REG  : STRING := "UNREGISTERED";
        RDCONTROL_ACLR : STRING := "OFF";
        OUTDATA_REG    : STRING := "UNREGISTERED";
        OUTDATA_ACLR   : STRING := "OFF");

    PORT (wren, inclock, outclock, aclr, outclocken: IN STD_LOGIC := '0';
        data: IN STD_LOGIC_VECTOR(WIDTH-1 DOWNTO 0);
        wraddress, rdaddress: IN STD_LOGIC_VECTOR(WIDTHAD-1 DOWNTO 0);
        inclocken, rden: IN STD_LOGIC := '1';
        q: OUT STD_LOGIC_VECTOR(WIDTH-1 DOWNTO 0) );
END COMPONENT;

LIBRARY altera_mf
USE altera_mf.altera_mf_components.all;

INPUT PORTS

OUTPUT PORTS

When the altdpram megafunction is used with the APEX 20K family, and both the WRADDRESS_REG and WRCONTROL_REG parameters are set to "INCLOCK", the value of the WRADDRESS_ACLR and WRCONTROL_ACLR parameters must be the same.

The altdpram function represents asynchronous memory or memory with synchronous inputs and/or outputs.

Synchronous Write to Memory (all inputs registered)
inclock inclocken wren Function   X L L No change. not H H No change. L X No change. H H The memory location pointed to by wraddress[] is loaded with data[].

Synchronous Read from Memory
inclock inclocken rden Function  X L L No change. not H H No change. L X No change. H H The q[] port outputs the contents of the memory location.

Totally asynchronous memory operations occur when neither inclock nor outclock is connected.

Uses one embedded cell per data output bit for ACEX 1K, APEX 20K, APEX II, ARM-based Excalibur, FLEX 10KE, and Mercury devices; however, in FLEX 6000, MAX 3000, and MAX 7000 devices, or if the USE_EAB paramter is set to "OFF", uses one logic cell per memory bit.

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