See Also

Parameterized single-clock FIFO megafunction. The lpm_fifo+ function uses mega RAMs or M4K or M512 memory blocks in Stratix^™ and Stratix^™ GX devices, M4K memory blocks in Cyclone^™ devices, Embedded System Blocks (ESB) in APEX^™ 20K, APEX^™ II, ARM^®-based Excalibur^™, and Mercury^™ devices, Embedded Array Blocks (EAB) in ACEX^® 1K and FLEX 10KE devices, or DFFE primitives or latch arrays in FLEX^® 6000, MAX^® 3000, and MAX 7000 devices or if the USE_EAB parameter is set to "OFF". If you need extra features, you may use the scfifo megafunction. Altera^® strongly recommends using synchronous rather than asynchronous RAM functions.

If you select lpm_fifo+ in the MegaWizard^® Plug-In Manager (Tools menu), the MegaWizard Plug-In Manager instantiates the scfifo megafunction for single-clock FIFO functions, or the dcfifo megafunction for dual-clock FIFO functions.

The Quartus® II Compiler automatically implements suitable portions of this function in mega RAMs or M4K or M512 memory blocks in Stratix and Stratix GX devices, in M4K memory blocks in Cyclone devices, in ESBs in APEX 20K, APEX II, ARM-based Excalibur, and Mercury devices, and in EABs in ACEX 1K and FLEX 10KE devices. The Compiler automatically implements this function in logic cells in FLEX 6000, MAX 3000, and MAX 7000 devices.

Altera also recommends instantiating this function as described in Using the MegaWizard Plug-In Manager.

The lpm_fifo+ function must contain at least one word before it is able to read a word and must have at least one unused word before it is able to write a word.

This topic contains the following information:

• AHDL Function Prototype (also applies to Verilog HDL)
• VHDL Component Declaration
• VHDL LIBRARY-USE Declaration (not required if the VHDL Component Declaration is used)
• Port Descriptions
• Parameter Descriptions
• Truth Table/Functionality
• Resource Usage

FUNCTION lpm_fifo (data[(LPM_WIDTH)-1..0], wrreq, rdreq, clock, aclr, sclr)
   WITH (LPM_WIDTH, LPM_NUMWORDS, LPM_WIDTHU, LPM_SHOWAHEAD, UNDERFLOW_CHECKING, OVERFLOW_CHECKING,
      ALLOW_RWCYCLE_WHEN_FULL, USE_EAB)
   RETURNS (q[(LPM_WIDTH)-1..0], empty, full, usedw[LPM_WIDTHU-1..0]

COMPONENT LPM_FIFO
   GENERIC (LPM_WIDTH: POSITIVE;
      LPM_WIDTHU: POSITIVE := 1;
      LPM_NUMWORDS: POSITIVE;
      LPM_SHOWAHEAD: STRING := "OFF";
      LPM_TYPE: STRING:= "LPM_FIFO";
      LPM_HINT: STRING := "UNUSED");
   PORT (data: IN STD_LOGIC_VECTOR(LPM_WIDTH-1 DOWNTO 0);
      clock, wrreq, rdreq: IN STD_LOGIC;
      aclr, sclr: IN STD_LOGIC := '0';
      full, empty: OUT STD_LOGIC;
      usedw: OUT STD_LOGIC_VECTOR(LPM_WIDTHU-1 DOWNTO 0);
      q: OUT STD_LOGIC_VECTOR(LPM_WIDTH-1 DOWNTO 0));
END COMPONENT;

LIBRARY lpm;
USE lpm.lpm_components.all;

INPUT PORTS

OUTPUT PORTS

Parameter	Type	Required	Description
LPM_WIDTH	Integer	Yes	Width of data[] and q[] ports.
LPM_NUMWORDS	Integer	Yes	Depth of the lpm_fifo. Number of words stored in memory, which is usually a power of 2.
LPM_WIDTHU	Integer	Yes	Required value is CEIL(LOG2(LPM_NUMWORDS)). Width of the usedw[] port.
LPM_SHOWAHEAD	String	No	Allows the data to appear immediately on q[] without asserting rdreq explicitly when set to "ON". Values are "ON" or "OFF" (the default is "OFF").
OVERFLOW_CHECKING	String	No	Altera-specific parameter. Disables the overflow-checking logic when set to "OFF", so that full is no longer checked for wrreq. Values are "ON" or "OFF" (the default is "ON"). Writing to a full lpm_fifo gives unpredictable results.
UNDERFLOW_CHECKING	String	No	Altera-specific parameter. Disables the underflow-checking logic when set to "OFF", so that empty is no longer checked for rdreq. Values are "ON" or "OFF" (the default is "ON"). Reading an empty lpm_fifo gives unpredictable results.
ALLOW_RWCYCLE_WHEN_FULL	String	No	Altera-specific parameter. Allows combined read/write cycles to an already full lpm_fifo, so that it remains full. Values are "ON" or "OFF" (the default is "OFF"). This parameter is used only when the OVERFLOW_CHECKING parameter is set to "ON".
USE_EAB	String	No	Altera-specific parameter. Values are "ON", "OFF", and "UNUSED". Setting the USE_EAB parameter to "OFF" prevents the Quartus II software from using ESBs to implement the logic in APEX 20K, APEX II, ARM-based Excalibur, and Mercury devices, or EABs in ACEX 1K and FLEX 10KE devices; it can use only flipflops or latches. (The "ON" setting is not useful in memory functions: the Quartus II software automatically implements memory functions in ESBs or EABs by default.) This parameter is not available for simulation with other EDA simulators and for FLEX 6000, MAX 3000, MAX 7000, Stratix, and Stratix GX devices.
LPM_HINT	String	No	Allows you to specify Altera-specific parameters in VHDL Design Files (.vhd). The default is "UNUSED". This parameter is not available for FLEX 6000 devices.
LPM_TYPE	String	No	Identifies the library of parameterized modules (LPM) entity name in VHDL Design Files.

The lpm_fifo function represents memory with synchronous inputs and/or outputs.

Synchronous Memory Operations
aclr sclr Clock rdreq wrreq Function L L X L L No change. L L not X X No change (requires positive clock edge). L L L H Write data to memory. L L H L Read memory and update q[]. L L H H Write data to memory and read memory to q[]. H L X X X Resets the lpm_fifo to empty. The q[] port becomes undefined. L H X X Resets the lpm_fifo to empty. The q[] port becomes undefined.

The following table summarizes the resource usage for an lpm_fifo megafunction used to implement an 8-bit-wide FIFO buffer. A depth of 8 words is used for the FLEX 6000, MAX 3000, and MAX 7000 device families. A depth of 256 words is used for all other device families.

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