This section describes in detail the functionality and semantics of each module in the LPM 210 specification.
The LPM modules fall into five major categories:
Note that truth table, finite state machine, RAM and ROM modules require
more information than can be contained in the LPM netlist to define their function. These
modules use supporting files to describe their function. These supporting files use the
standard Intel HEX, Berkeley PLA and KISS formats.
Where logic equations or logic models are used, the following symbols are used for both single bit operations and bit-wise vector operations:
The drawings of all modules in this document use the following conventions (shown in the figure below):
Scan Test Conventions
All of the modules that have scan-test ports (LPM_COUNTER, LPM_LATCH, LPM_FF, LPM_FSM)
use the same convention. The TestOut port always has the same value as the most
significant bit of the output (Q or State). When TestEnab is high,
the data on TestIn is shifted into the least significant bit of the associated
register as the contents of the register are shifted towards the most significant bit.
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